JR88115 Senior Engineer - CMOS & Metallization Test Structure Design and Layout Relocation Level TBD Responsibilities Support process development activities through memory cell-based test structure solutions by actively engaging with Process Integration, Product and Design, Electrical Characterization, Advanced Mask Development and Design Rule teams. Interpret electrical DUT (Device under Test) definition and build completed Test Element Groups (TEGs) with high confidence functionality on silicon. Implement novel solutions as the need arises to study failure mechanisms and monitor the health of silicon. Assist with parametric correlation and debug to ensure build accuracy. Verify and validate test structure documentation and related parametric information. Minimum Qualifications Bachelor of Science in Electrical or Microelectronic Engineering with 5 years of experience. Hands‑on experience and proficiency in EDA tools such as Cadence Virtuoso Layout and Schematic Editor, and Calibre. Excellent circuit build, layout, schematic and verification skills including DRC, LVS and circuit simulation (HSPICE). Excellent knowledge of semiconductor device physics, operation, parametric testing and Design for Manufacturability (DFM). Good knowledge of DRAM and NAND memory array design architectures, fab processes and failure modes. Excellent problem‑solving and strong people skills. A global mindset to work across cultures and a sense of ownership to independently drive improvements on department‑level projects. Preferred Qualifications Master of Science in Electrical or Microelectronic Engineering with 3 years of experience. Proficiency in Perl, Skill code and UNIX shell scripting languages. Willingness to learn new skills and explore unfamiliar concepts. Benefits Medical, dental and vision plans available at all locations, allowing team members to choose plans that best meet their health needs and budget. Income protection programs for illness or injury. Paid family leave. Robust paid time‑off program and paid holidays. Equal Employment Opportunity Statement Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state or local laws. #J-18808-Ljbffr
Senior Engineer - Cmos & Metallization Test Structure Design And Layout
MICRON TECHNOLOGY, INC
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Publicado hace 7 días
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