In the Research and Development (R&D) Scribe Build Group, we drive innovation in advanced technology development through scribe test structure build, layout, and validation. Our team collaborates across multiple disciplines to enable cutting‑edge semiconductor solutions. As a Scribe Design Non‑Array Engineer, you will design, layout, and verify electrical test structures that enable CMOS device development, compact modeling, reliability, modeling and fab process monitoring. You will partner with cross‑functional teams to support process development and manufacturing integration. Responsibilities Support process development activities through memory cell‑based test structure solutions by actively engaging with Process Integration, Product and Design, Electrical Characterization, Advanced Mask Development and Design Rule teams. Interpret electrical DUT (Device under Test) definition and build completed TEGs (Test Element Groups) with high confidence functionality on Silicon. Implement novel solutions as the need arises to study the failure mechanisms and to monitor the health of silicon. Assist with parametric correlation and debug to ensure build accuracy. Verify and validate test structure documentation and related parametric information. Minimum Qualifications Bachelor of Science in Electrical or Microelectronic Engineering with 5 years of experience. Hands‑on experience and proficiency in EDA tools such as Cadence Virtuoso Layout and Schematic Editor, and Calibre. Excellent circuit build, layout, schematic, and verification skills including DRC, LVS, and circuit simulation (hspice). Excellent knowledge of semiconductor device physics, operation, parametric testing, and Design for Manufacturability (DFM). Good knowledge of DRAM and NAND Memory Array design architectures, fab processes, and failure modes. Excellent problem‑solving and strong people skills. A global mindset to seamlessly work across cultures and a sense of ownership to independently drive improvements on department level projects. Preferred Qualifications Master of Science in Electrical or Microelectronic Engineering with 3 years of experience. Proficiency in Perl, Skill code, and UNIX shell scripting languages. Willingness to learn new skills and explore unfamiliar concepts. The specified role does not encompass the following responsibilities: finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. #J-18808-Ljbffr
Senior Engineer - Cmos & Metallization Test Structure Design And Layout
MICRON TECHNOLOGY
tlaquepaque, tlaquepaque
Publicado hace 17 días
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