Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: Engineering Group, Engineering Group ASICS Engineering General Summary: Join QCOM Technologies Inc vibrant Global CAD team pushing the limits of design solutions for the Snapdragon chips powering billions of mobile devices. The position requires Python or C++ coding experience and CAD development skills to define and develop tools and methodologies for various design flows, in close collaboration with Snapdragon Physical Design and Timing/PDN teams and CAD domain experts. Qualcomm is using leading edge internal and EDA technologies, including pioneering in genAI/ML, and developing good-by-construction tools for chip RTL integration and floorplanning. Responsibilities Develop and maintain internal software products in the domain of top-level chip floorplanning RTL modules placement and datapath pipeline routing for optimal timing and area. Develop new features in existing internal software tools, including webapp GUI development, design collaterals parsers, high-level APIs. Develop and augment design flow infrastructure software tools, for instance to automate design regression or extract standalone design testcases from production execution area for regression purpose. Apply best coding practice, in terms of class definition, linting, adherence to the CI/CD pipeline, documentation. Participate to the Project Specs development through meetings with key Snapdragon chips designers and CAD project leads, about the scope and the required features. Participate to the Software Specs development along with software leads, including creating UML diagrams showing the intended software architecture. Interfacing with Qualcomm Global CAD software developers and VLSI domain experts. Preferred Qualifications Masters degree or PhD in Computer Science, Compute Engineering, or related field. 1-4 years of experience in software development in Python, Javascript or C++. Python preferred. Experience in software development platforms, such as git, gitlab or github. Principal Duties and Responsibilities New features development and software maintenance on the Physical Aware Tiling Qualcomm internal tool, which purpose is to assist VLSI designer to optimally place 100+ chip infrastructure RTL modules inside the top-level chip floorplan and route the data paths between these modules with minimization of the detours and pipelines stages. Physical Aware Tiling support to the Snapdragon design team, through tickets and code fixing in case of dysfunctional corner cases. Participate to the software development of projects in various VLSI domains such as floorplanning, synthesis, place and route, signoff timing analysis etc. Participate to the software development of projects pertaining to CAD software infrastructure, including infrastructure for AI agents, design regression automation etc. Participate to the development of project specs along with the CAD project lead and to the development of software specs with the software lead. Adhere to all the Qualcomm Software development best practices, including GenAI unit test development, linting, procs and classes guidelines, documentation, gitlab merge requests etc. Minimum Qualifications Bachelor's degree in Science, Engineering, or related field. #J-18808-Ljbffr