Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. Layout Design Engineer – DDR Team, Guadalajara, Mexico As a Layout Design Engineer, you will be collaborating with peer teams across Micron's global footprint on multiple project-based environments. Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support Perform layout verification like LVS/DRC/Antenna, quality check and documentation Responsible for on-time delivery of block-level layouts with acceptable quality. Effectively communicating with Global engineering teams to assure the success of layout projects. Bachelor / master's degree in Electronics or related (no more than 2 years of graduation). Knowledge of Analog Layout fundamentals (e.g., Matching, Electro‑migration, Latch‑up, coupling, crosstalk, IR‑drop, active and passive parasitic devices et al.) Ability to understand design constraints and implement high‑quality layout. Qualifications Excellent command and problem‑solving skills in physical verification of custom layout Knowledge in Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS. Understanding layout effects on the circuit such as speed, capacitance, power and area et al. #J-18808-Ljbffr