QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Engineering Group Hardware Engineering General Summary This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip). The role focuses on defining and executing test methodologies and characterizing high‑speed SERDES interfaces such as PCIe, USB3, UFS, DP, MIPI(DSI,CSI), PLLs and other proprietary interfaces. Responsibilities include developing and executing characterization plans to optimize design parameters and validate electrical compliance, driving corresponding first‑silicon bring‑up and debug to qualify designs fabricated at external foundries, and performing technical data analysis of parametric performance over various operating conditions and configurations. The engineer will also assist in hardware design and debug of PI and SI issues related to package and board design, and work closely with cross‑functional teams such as IC Design and Systems Engineering for chip/circuit bring‑up and debug. Collaboration with Customer Engineering and Hardware Applications teams to resolve customer issues/RMA debug in a time‑critical environment is also required. The candidate should be passionate about delivering quality work products and be committed to continual learning of new products, industry trends, competitor products, and advances in various engineering fields. Responsibilities Develop and execute test methodologies and characterization for high‑speed SERDES interfaces (PCIe, USB3, UFS, DP, MIPI(DSI,CSI), PLLs, and other proprietary interfaces). Design and conduct characterization plans to optimize design parameters and validate electrical compliance across operating conditions. Lead first‑silicon bring‑up and debug to qualify designs fabricated at external foundries. Analyze parametric performance data and provide technical insights for optimization. Assist in hardware design and debug of power integrity (PI) and signal integrity (SI) issues related to package and board design. Collaborate with cross‑functional teams (IC Design, Systems Engineering) for chip/circuit bring‑up and debugging. Partner with Customer Engineering and Hardware Applications teams to resolve customer RMA issues in time‑critical environments. Conduct specialized analyses (feasibility studies, signal integrity, teardown analyses) and stay updated on industry trends. Minimum Qualifications Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field AND 4+ years of hardware engineering or related experience. Master’s degree in the same fields AND 3+ years of hardware engineering or related experience. PhD in the same fields AND 2+ years of hardware engineering or related experience. English fluent (95% verbal and written). Preferred Qualifications 7+ years of work experience. Strong understanding of VLSI technologies, CMOS analog and digital integrated circuits, mixed‑signal and semiconductor physics. Knowledge of high‑speed test and characterization, including eye diagram characteristics, differential signals, jitter analysis, and signal integrity. Familiarity with SERDES characterization/validation and transmitter/receiver design blocks. Hands‑on experience with lab equipment such as oscilloscopes, TDRs/VNAs, J‑BERT. Experience with Python/C# for test automation. Familiarity with board‑design concepts (schematic reviews, layout best practices). Good ASIC device‑level characterization skills; system‑level knowledge is a plus. Strong verbal and written communication, organizational, and documentation skills. Strong problem‑solving and debugging skills; ability to work independently and proactively to overcome technical challenges. Strong interpersonal and teamwork skills with proven ability to work effectively in a fast‑paced, multidisciplinary environment. Equal Opportunity Employer Applicants: Qualcomm is an equal‑opportunity employer. Qualcomm is committed to providing an accessible process for individuals with disabilities. #J-18808-Ljbffr