Req ID: JR96245 – New College Graduate – CMOS & Metallization Test Structure Design and Layout Semiconductor Design Engineer 2 Relocation Level: TBD Responsibilities Support process development activities through memory cell‑based test structure solutions by actively engaging with Process Integration, Product and Die Design, Electrical Characterization, Advanced Mask Development and Design Rule teams. Interpret electrical DUT (Device under Test) definition and build completed TEGs (Test Element Groups) with high confidence functionality on Silicon. Implement novel solutions as the need arises to study the failure mechanisms and to monitor the health of silicon. Assist with parametric correlation and debug to ensure design accuracy. Verify and validate test structure documentation and related parametric information. Minimum Qualifications Master’s degree in electrical, Computer, or Microelectronic Engineering (no more than 2 years of graduated) Hands‑on experience with EDA tools (Cadence Virtuoso Layout and Schematic Editor, Calibre). Strong circuit design, layout, schematic, and verification skills including DRC, LVS, and circuit simulation (HSPICE). Strong knowledge of semiconductor device physics, operation, parametric testing, and DFM. Familiarity with memory array design architectures, fab processes, and failure modes. Ability to interpret DUT definitions and deliver completed TEGs. Excellent problem‑solving and interpersonal skills. Willingness to learn new skills and explore unfamiliar concepts. Ability to drive decisions through data and metrics. Preferred Qualifications Proficiency in Perl, Skill code, and UNIX shell scripting languages. Experience in design debug based on silicon learning. Advanced knowledge of silicon processes, mask development and OPC processes. Role Clarification The specified role does not encompass the following responsibilities: finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be they conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position. Benefits Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc. Equal Opportunity Employment Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr
New College Grad - Cmos & Metallization Test Structure Design And Layout
MICRON TECHNOLOGY, INC
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Publicado hace 7 días
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