Job Details: Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position. Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Behavioral traits Collaborating within cross-functional teams to resolve complex technical challenges Analytical and problem-solving skills with attention to detail Communicate technical concepts effectively to diverse audiences Very good logical thinking, ability to prioritize work and multi-tasking Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science or a related field. 6+ months of experience in Industry-standard verification methodologies such as UVM or System Verilog or Digital Design Advance English level. Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship). Preferred Qualifications 3+ years System Verilog and UVM experience 2+ years in: Python for test automation. Simulation tools (VCS, Xcelium, Questa) ARM-based SoC or equivalent architectures Pre-silicon verification experience Memory subsystems, cache coherency, power management AMBA protocols (AXI, AHB, APB) and interconnects C/C++ and scripting proficiency (Perl, Tcl, Shell) Formal verification tools and coverage analysis Constrained random and assertion-based verification Linux/Unix and version control (Git, Perforce) Regression testing and CI/CD pipelines Security verification methodologies Experience in some or all aspects of pre-silicon functional verification, including planning, debug, testbench design, UPF and coverage closure Job Type College Grad Shift Shift 1 (Mexico) Primary Location Mexico, Guadalajara Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Work Model for this Role This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change. Additional Information Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. #J-18808-Ljbffr