As a Design Verification Engineer for Micron, you will work with highly innovative and motivated design and verification teams using groundbreaking memory technologies to develop the most advanced DRAM and Emerging memory products. You will work on designing/verifying the high-density memory chip with complicated functionality, ultra-high speed, advanced low power, and power management technology. You will have verification responsibilities with deep understanding the design to fully evaluate the design at chip or block level on functionality, then provide solution. You will help develop digital/analog mixed-signal verification methodology for advanced DRAM products and design and implementation of mixed-signal design verification environment. Senior Design Verification Engineer Responsibilities Fully understanding of the design datasheet. Study and learn circuit design in detail. Understand the functionality and timing requirements of the circuitry. Develop patterns and regressions to increase the function coverage for all DRAM architectures and features. Provide support to design engineers, debug failures, lead bug tracking, and close coverage. Co-work with international colleagues on developing new verification tools and flows to solve the verification difficulties. Own and lead design projects and mentor junior engineers. Develop and maintain test benches and test vectors using digital and analog simulation tools. Create verification plan from functionality specification and in coordination with architects. Work with cross-functional group to define and develop DFT patterns. Qualifications Basic understanding of CMOS circuit design. Experience in mixed signal verification. Familiar with analog/digital simulation tools, e.g., HSPICE, Verilog HDL, FINESIM. Knowledge and experience in verification languages (SystemVerilog or equivalent) and methodologies (UVM or equivalent) and other scripting languages (Python, Perl, etc.). Good debugging and problem-solving skills. Effective communication skills with the ability to convey sophisticated technical concepts to other verification peers. Excellent communication skills and ability to work well in a team. Experience with System Verilog Assertion (SVA). A strong leadership skill and attitude. BS or MS (preferred) in Electrical Engineering, Computer Engineering or equivalent. Experience in leading small or large projects preferred. #J-18808-Ljbffr