As a Scribe Array Design Engineer, you will design and validate memory cell & support circuitry‑based test structures, manage design revisions, and partner with cross‑functional teams to support process development and manufacturing integration. Responsibilities Support process development activities through memory cell‑based test structure solutions by actively engaging with Process Integration, Product and Die Design, Electrical Characterization, Advanced Mask Development and Design Rule teams. Interpret electrical DUT (Device under Test) definition and build completed TEGs (Test Element Groups) with high confidence functionality on Silicon. Implement novel solutions to study failure mechanisms and monitor silicon health. Assist with parametric correlation and debugging to ensure design accuracy. Verify and validate test structure documentation and related parametric information. Minimum Qualifications Bachelor of Science in Electrical or Microelectronic Engineering with 5 years of experience. Hands‑on experience and proficiency in EDA tools such as Cadence Virtuoso Layout and Schematic Editor, and Calibre. Excellent circuit design, layout, schematic, and verification skills including DRC, LVS, and circuit simulation (hspice). Excellent knowledge of semiconductor device physics, operation, parametric testing, and Design for Manufacturability (DFM). Good knowledge of DRAM and NAND Memory Array design architectures, Fab processes, and failure modes. Excellent problem‑solving and strong communication skills. Global outlook to work across cultures and ownership to independently drive improvements on department level projects. Preferred Qualifications Master of Science in Electrical or Microelectronic Engineering with 3 years of experience. Proficiency in Perl, skill code, and UNIX shell scripting languages. Willingness to learn new skills and explore unfamiliar concepts. Relocation Level TBD Equal Opportunity Employer Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr
Senior Engineer - Memory Cell Test Structure Design And Layout
MICRON TECHNOLOGY, INC
tlaquepaque, tlaquepaque
Publicado hace 7 días
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