Req ID: JR86164 Sr Engineer, Memory CAD, Guadalajara Responsibilities Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop advanced capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. Minimum Qualifications Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed-signal, custom IC design flows. Proven experience working in highly technical IC Design or CAD teams distributed worldwide. Familiarity with memory design (DDR3/4/5, LP3/4/5, HBM, NAND). Preferred Qualifications Experience qualifying vendor tools and internally developed software releases. Proven ability to develop software prototypes for innovative ideas in IC design, layout, and analysis. Experience running agile (software) sprints. Experience with Machine Learning algorithms and applications, and delivering production-grade ML applications in IC Design. Relocation Level: TBD Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr